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NJU6367 Series Fundamental Quartz Crystal Oscillator sGENERAL DESCRIPTION The NJU6367 series is a C-MOS fundamental quartz crystal oscillator that consists of an oscillation amplifier, 3-stage divider and 3-state output buffer. The 3-stage divider generates only one frequency selected of f0,f0/2,f0/4 f0/8, f0/16 and f0/32 by internal circuits is output. The oscillation amplifier is realized very low stand-by current using NAND circuit. The 3-state output buffer is C-MOS compatible. sPACKAGE OUTLINE NJU6367XC-D sFEATURES qOperating Voltage 2.0 to 5.5V qMaximum Oscillation Frequency 50MHz qLow Operating Current qHigh Fan-out IOH/IOL=5mA@2.5V IOH/IOL=6mA@3.0V IOH/IOL=12mA@5.0V q3-Stage Divider Maximum Divider f0/32 qOscillation Stop and Output Stand-by Function q3-State Output Buffer qOscillation Capacitors Cg and Cg on-chip qPackage Outline Thin-Chip qC-MOS Technology sLINE-UP TABLE Type No. A B C D E F P FOUT f0 f0/2 f0/4 f0/8 f0/16 f0/32 f0 Internal Connect Connected A Line Connected B Line Connected C Line Connected D Line Connected E Line Connected F Line Connected A Line Cg/Cd 23/23pF 23/23pF 23/23pF 23/23pF 23/23pF 23/23pF Non sPAD LOCATION Thin-Chip CONT XT XT VSS VDD FOUT sCOORDINATES No 1 2 3 4 5 6 Pad Name X -178 -178 -178 -178 206 206 Y 231 77 -77 -231 -231 231 CONT XT NJU6367 XT VSS FOUT VDD Starting Point:Chip Center Unit[um] Chip Size:0.7x0.75mm Thin-Chip Thickness(-D):20020um Pad Size:90x90um sBLOCK DIAGRAM XT VDD Rf VSS XT 1/ 2 1/ 2 1/ 2 1/ 2 1/ 2 Cg Cd A B C D E F 3 - STATE BUFFER FOUT CONT 2002/07/15 ( 1 / 6 ) NJU6367 Series sTERMINAL DESCRIPTION SYMBOL FUNCTION Oscillation and 3-state Output Buffer Control FOUT CONT Output either one frequency selected of f0, CONT H or OPEN f0/2,f0/4,f0/8, f0/16 and f0/32 Note1) L Oscillation Stop and High impedance Output Quartz Crystal Connecting Terminals XT VSS VSS=0V FOUT Frequency Output VDD VDD=2.5/3.0V/5.0V Note1) Refer to the line-up table. sABSOLUTE MAXIMUM RATINGS (Ta=25C) PARAMETER SYMBOL RATING UNIT Supply Voltage VDD -0.5 to +7.0 V Input Voltage VIN VSS-0.5 to VDD+0.5 V Output Voltage VO -0.5 to VDD+0.5 V Input Current IIN mA 10 Output Current IO mA 25 Operating Temperature Range Topr -40 to +85 C Storage Temperature Range Tstg -55 to +125 C Note2) If the supply voltage(VDD) is less than 7.0V, the input voltage must not over the VDD level though 7.0V is limit specified. Note3) Decupling capacitor should be connected between VDD and VSS due to the stabilized operation for the circuit. XT 2002/07/15 ( 2 / 6 ) NJU6367 Series sELECTRICAL CHARACTERISTICS PARAMETER Operating Voltage SYMBOL VDD CONDITIONS MIN 2.0 TYP (Ta=25C) MAX UNIT 5.5 V (VDD=2.5V,Ta=25C) MAX UNIT 5 4 3 3 mA 3 3 5 2 Note5) 2.0 0 5 5 7.5 1.2 5 1 2.5 0.5 uA uA V V mA mA uA uA uA K pF MHz 55 55 6 8 6 8 200 200 % ns ns ns ns PARAMETER SYMBOL Operating Current IDD CONDITIONS A version,fosc=16MHz,CL=15pF B version,fosc=16MHz,CL=15pF C version,fosc=16MHz,CL=15pF D version,fosc=16MHz,CL=15pF E version,fosc=16MHz,CL=15pF F version,fosc=16MHz,CL=15pF P version,fosc=16MHz,CL=15pF Note4) MIN TYP Oscillation Stopping Current Stand-by Current Input Voltage Output Current Input Current 3-state Off Leakage Current Feedback Resistance Internal Capacitor ISTB Ist VIH VIL IOH IOL IIN IOZ Rf Cg/Cd CONT =VSS, No load CONT =XT=VSS, No load VOH=2.2V VOL=0.3V CONT =0.8VDD CONT =0.2VDD CONT =VSS, FOUT= VDD or VSS fosc=16MHz, A/B/C/D/E/F version P version 12.0 2.0 0.1 227 23/23 - Maximum Oscillation FMAX 50 Frequency Output Signal CL=15pF, @VDD/2 45 50 SYM Symmetry CL=30pF, @VDD/2 45 50 Output Signal Rise CL=15pF,10% to 90% 3 tr Time CL=30pF,10% to 90% 4 Output Signal Fall CL=15pF,90% to 10% 3 tf Time CL=30pF,90% to 10% 4 TPLZ Output Disable time CL=15pF,RUP=10k TPZL Output Enable Time CL=15pF,RUP=10k Note4) P version is measured with external capacitors contained 23pF for Cg and 23pF for Cd. Note5) Excluding input current on CONT Terminal. 2002/07/15 ( 3 / 6 ) NJU6367 Series PARAMETER SYMBOL CONDITIONS A version,fosc=16MHz,CL=15pF B version,fosc=16MHz,CL=15pF C version,fosc=16MHz,CL=15pF D version,fosc=16MHz,CL=15pF E version,fosc=16MHz,CL=15pF F version,fosc=16MHz,CL=15pF P version,fosc=16MHz,CL=15pF Note4) MIN TYP (VDD=3.0V,Ta=25C) MAX UNIT 6 5 4 4 mA 4 4 6 2 Note5) 2.1 0 6 6 10.0 1.8 5 1 3.0 0.9 uA uA V V mA mA uA uA uA K pF MHz 55 55 6 8 6 8 150 150 % ns ns ns ns Operating Current IDD Oscillation Stopping Current Stand-by Current Input Voltage Output Current Input Current 3-state Off Leakage Current Feedback Resistance Internal Capacitor ISTB Ist VIH VIL IOH IOL IIN IOZ Rf Cg/Cd CONT =VSS, No load CONT =XT=VSS, No load VOH=2.7V VOL=0.3V CONT =0.8VDD CONT =0.2VDD CONT =VSS, FOUT= VDD or VSS fosc=16MHz, A/B/C/D/E/F version P version 15.0 3.0 0.1 227 23/23 - Maximum Oscillation FMAX 50 Frequency Output Signal CL=15pF, @VDD/2 45 50 SYM Symmetry CL=30pF, @VDD/2 45 50 Output Signal Rise CL=15pF,10% to 90% 3 tr Time CL=30pF,10% to 90% 4 Output Signal Fall CL=15pF,90% to 10% 3 tf Time CL=30pF,90% to 10% 4 TPLZ Output Disable time CL=15pF,RUP=10k TPZL Output Enable Time CL=15pF,RUP=10k Note4) P version is measured with external capacitors contained 23pF for Cg and 23pF for Cd. Note5) Excluding input current on CONT Terminal. 2002/07/15 ( 4 / 6 ) NJU6367 Series PARAMETER SYMBOL CONDITIONS A version,fosc=16MHz,CL=15pF B version,fosc=16MHz,CL=15pF C version,fosc=16MHz,CL=15pF D version,fosc=16MHz,CL=15pF E version,fosc=16MHz,CL=15pF F version,fosc=16MHz,CL=15pF P version,fosc=16MHz,CL=15pF Note4) MIN (VDD=5.0V,Ta=25C) TYP MAX UNIT 10 9 9 8 mA 8 8 10 5 Note5) 3.5 0 12 12 27.0 5.5 10 1 5.0 1.5 uA uA V V mA mA uA uA uA K pF MHz 55 55 4 6 4 6 100 100 % ns ns ns ns Operating Current IDD Oscillation Stopping Current Stand-by Current Input Voltage Output Current Input Current 3-state Off Leakage Current Feedback Resistance Internal Capacitor ISTB Ist VIH VIL IOH IOL IIN IOZ Rf Cg/Cd CONT =VSS, No load CONT =XT=VSS, No load VOH=4.5V VOL=0.5V CONT =0.8VDD CONT =0.2VDD CONT =VSS, FOUT= VDD or VSS 40.0 8.0 0.1 fosc=16MHz, A/B/C/D/E/F version P version 227 23/23 - Maximum Oscillation FMAX 50 Frequency Output Signal CL=15pF, @VDD/2 45 50 SYM Symmetry CL=30pF, @VDD/2 45 50 Output Signal Rise CL=15pF,10% to 90% 2 tr Time 3 CL=30pF,10% to 90% Output Signal Fall CL=15pF,90% to 10% 2 tf Time CL=30pF,90% to 10% 3 TPLZ Output Disable time CL=15pF,RUP=10k TPZL Output Enable Time CL=15pF,RUP=10k Note4) P version is measured with external capacitors contained 23pF for Cg and 23pF for Cd. Note5) Excluding input current on CONT Terminal. 2002/07/15 ( 5 / 6 ) NJU6367 Series sMEASURMENT CIRCUITS (1)Output Signal Symmetry(CL=15pF) 1000pF Pulse Generator 50 XT VDD FOUT CL=15pF VSS 1/2VDD H L (2)Output Signal Rise/Fall Time(CL=15pF) 1000pF Pulse Generator 50 XT VDD FOUT CL=15pF VSS tr tf 90% 50% 10% (3)Output Disable/Enable Time(CL=15pF,RUP=10k) VDD XT Pulse Generator 50 CONT VSS FOUT RUP=10k CONT CL=15pF FOUT VOL 0.2VDD TPLZ 0.8VDD TPZL VOH [CAUTION] The specifications on this data book are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this data book are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. 2002/07/15 ( 6 / 6 ) |
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